The LCD (Liquid Crystal Display) comprises a plurality of pixels aligned in array. As shown in FIG. 1, each pixel generally comprises sub pixels of three colors, the red sub pixels R, the green sub pixels G, the blue sub pixels B. Each sub pixel is controlled by one gate line and one data line. The gate line is employed to control the on and off of the sub pixel, and the data line applies various data voltage signals to make the sub pixel show various gray scales, and thus for realizing the full color image display.
With the development of display technology, people has higher and higher demands for the display qualities, such as the display brightness, the color reducibility and the richness of image colors. The display panel, which merely uses the red, the green and the blue, three primary colors, can no longer satisfy the requirements of the people. Then, a four primary colors display panel consisted of red, green, blue, white, four colors is proposed. Specifically, a white sub pixel is added in each pixel to form the RGBW pixel structure shown in FIG. 2 composed by the red sub pixel R, the green sub pixel G, the blue sub pixel B and the white sub pixel W. The RGBW four primary colors display panel possesses higher transmission rate than the RGB three primary colors display panel as showing the same display image, and can reduce the ⅓ of pixel amount to lower the production yield risk of ultra high resolution under the premise of the constant resolution with use of the sub pixel sharing algorithm. Meanwhile, the backlight power consumption is decreased 40% and the picture contrast can be raised, and thus is subjected to the consumer trackhold.
With the rapid development of the LCD technology, the requirement of the people for the LCD clarity has become higher and higher. Namely, the demand for the display panel resolution gets higher and higher; meanwhile, due to the increase of the resolution, the amount of the source line of executing the output control gets more and more. At present, the main stream method is to respectively charge each column of pixels with the multiplex module (MUX) switching the time division multiplexing to achieve the objective of decreasing the amount of source lines. However, each switch control signal in the multiplex module must be switched with a certain switch frequency for being able to drive the entire display panel to normally display.
Most of the present RGBW four primary colors display panels utilizes a drive architecture of driving eight columns of sub pixels (2 to 8 De-mux) by two source drive lines with multiplexing and is generally applied for the Column inversion. The RGBW four primary colors display panel comprises a plurality of drive units, and as shown in FIG. 3, each unit comprising one multiplex module 10 and a first column of pixels P1 and a second column of pixels P2. Either of the first column of pixels P1 and the second column of pixels P2 comprising a red sub pixel R, a green sub pixel G, a blue sub pixel B and a white sub pixel W which are located from left to right in order. The multiplex module 10 comprises a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a fourth thin film transistor T4, a fifth thin film transistor T5, a sixth thin film transistor T6, a seventh thin film transistor T7, an eighth thin film transistor T8 which are located from left to right in order: a gate of the first thin film transistor T1 receiving the red sub pixel switch control signal MUXR, and a source receiving a first source drive signal S1 through a first source drive line L1, and a drain being coupled to the red sub pixel R in the first column of pixels P1; a gate of the second thin film transistor T2 receiving the green sub pixel switch control signal MUXG, and a source receiving the first source drive signal S1 through the first source drive line L1, and a drain being coupled to the green sub pixel G in the second column of pixels P2; a gate of the third thin film transistor T3 receiving the blue sub pixel switch control signal MUXB, and a source receiving the first source drive signal S1 through the first source drive line L1, and a drain being coupled to the blue sub pixel B in the second column of pixels P2; a gate of the fourth thin film transistor T4 receiving the white sub pixel switch control signal MUXW, and a source receiving the first source drive signal S1 through the first source drive line L1, and a drain being coupled to the white sub pixel W in the first column of pixels P1; a gate of the fifth thin film transistor T5 receiving the red sub pixel switch control signal MUXR, and a source receiving a second source drive signal S2 through a second source drive line L2, and a drain being coupled to the red sub pixel R in the second column of pixels P2; a gate of the sixth thin film transistor T6 receiving the green sub pixel switch control signal MUXG, and a source receiving the second source drive signal S2 through the second source drive line L2, and a drain being coupled to the green sub pixel G in the first column of pixels P1; a gate of the seventh thin film transistor T7 receiving the blue sub pixel switch control signal MUXB, and a source receiving the second source drive signal S2 through the second source drive line L2, and a drain being coupled to the blue sub pixel B in the first column of pixels P1; a gate of the eighth thin film transistor T8 receiving the white sub pixel switch control signal MUXW, and a source receiving the second source drive signal S2 through the second source drive line L2, and a drain being coupled to the white sub pixel W in the second column of pixels P2. Besides, the first source drive signal S1 is amplified by a first amplifier AMP1, and the second source drive signal S2 is amplified by a second amplifier AM P2.
FIG. 4 is a sequence circuit diagram of a drive unit in a RGBW four primary colors display panel shown in FIG. 3. The waveforms of the red sub pixel switch control signal MUXR, the green sub pixel switch control signal MUXG, the blue sub pixel switch control signal MUXB and the white sub pixel switch control signal MUXW are the same but only the generation points of the first pulses are distinct. Meanwhile, a sum of the durations of the pulse high voltage levels of the four pixel switch control signals MUXR, MUXG, MUXB, MUXW is equal to
Combining FIG. 3 and FIG. 4, at present, the drive process of the RGBW four primary colors display panel is:
the gate scan signal is generated row by row, and as the nth gate scan signal Gate (n) comes, the nth row of sub pixels are all enabled. First, the red sub pixel switch control signal MUXR is pulled up, and the rest green sub pixel switch control signal MUXG, blue sub pixel switch control signal MUXB and white sub pixel switch control signal MUXW are all pulled down, and only the first thin film transistor T1 and the fifth thin film transistor T1 are activated, and the first source drive signal S1 and the second source drive signal S2 start charging the nth row of the red sub pixels R, and after one clock cycle, the charge to the red sub pixels R is accomplished;
then, the green sub pixel switch control signal MUXG is pulled up, the rest red sub pixel switch control signal MUXR, blue sub pixel switch control signal MUXB and white sub pixel switch control signal MUXW are all pulled down, and only the second thin film transistor T2 and the sixth thin film transistor T6 are activated, and the first source drive signal S1 and the second source drive signal S2 start charging the nth row of the green sub pixels G, and after one clock cycle, the charge to the green sub pixels G is accomplished;
then, the blue sub pixel switch control signal MUXB is pulled up, the rest red sub pixel switch control signal MUXR, green sub pixel switch control signal MUXG and white sub pixel switch control signal MUXW are all pulled down, and only the third thin film transistor T3 and the seventh thin film transistor T7 are activated, and the first source drive signal S1 and the second source drive signal S2 start charging the nth row of the blue sub pixels B, and after one clock cycle, the charge to the blue sub pixels B is accomplished;
finally, the white sub pixel switch control signal MUXW is pulled up, the rest red sub pixel switch control signal MUXR, green sub pixel switch control signal MUXG and blue sub pixel switch control signal MUXB are all pulled down, and only the fourth thin film transistor T4 and the eighth thin film transistor T8 are activated, and the first source drive signal S1 and the second source drive signal S2 start charging the nth row of the white sub pixels W, and after one clock cycle, the charge to the white sub pixels W is accomplished.
Next, as the n+1th gate scan signal Gate (n+1) comes, the aforesaid process is repeated;
As the n+2th gate scan signal Gate (n+2) comes, the aforesaid process is repeated, again;
Accordingly, the red sub pixel switch control signal MUXR, the green sub pixel switch control signal MUXG, the blue sub pixel switch control signal MUXB and the white sub pixel switch control signal MUXW must perform the level switch for every row. Namely, the switch frequency of one frame must be M times (M is the row amount of RGBW four primary colors display panel resolution) for satisfying the requirement of the normal work of the RGBW four primary colors display panel. Thus, it will lead to the too fast switch frequency of the multiplex module 10. According to the power consumption calculation formula of the multiplex module:Powermux=Cmux×Vmux2×fmux                wherein Powermux is the power consumption of the multiplex module 10;        Cmux is the capacitance value of the multiplex module 10;        Vmux is the voltage applied by the multiplex module 10;        fmux is the frequency of the respective switch control signals in the multiplex module 10;        
Then, the power consumption of the multiplex module 10 is proportional to the frequency of the respective sub pixel switch control signals, and too fast switch frequency of the multiplex module 10 will lead to the excessive power consumption.